In the early days of computing, programmers developed on the bare hardware in the hardware's language. 在计算机出现早期,程序员是使用硬件语言在裸硬件上进行开发的。
This is a hardware description language used to design the traffic light procedures, and practical, it is economic. 这是一个用硬件描述语言来设计的交通灯程序,和实用,很经济。
Nonprocedural computer hardware description language 非过程计算机硬件描述语言
The design technology and tool has seen a tremendous change with the springing of lare scale programme tool-CPLD/ FPGA and broad application of hardware language. 大规模可编程逻辑器件CPLD/FPGA的出现和硬件描述语言的广泛应用使得电子系统的设计技术和工具发生了深刻的变化。
Updating, maintaining and managing various multimedia software and hardware in language classrooms. 更新、维护、报修及管理语言教室中教学单位所需之各种多媒体软硬体设。
The circuit software was designed using schematic diagram and hardware description language ( VHDL) respectively. 该抢答器单元电路的软件设计分别利用原理图设计、硬件描述语言设计完成。
In the design flow of hardware description language, one of the design ways, Top-Down, was used so as to shorten the design periods and enhance the expansile performance. 在硬件描述语言的设计流程中,信道盲均衡器运用了Top-Down的模块化设计方法,大大缩短了设计周期,提高了系统的稳定性和可扩展性。
An Analog Hardware Description Language ( AHDL) model of the membrane was developed to enable the simulations of the complete microsystem. 一个模拟硬件描述语言(AHDL)模型膜发展使模拟系统完整化。
The VHDL hardware description language is designs the source document to be possible to use is similar with the C language written form, and uses the structural design method. VHDL硬件描述语言是设计源文件可以采用类似与C语言的书写形式,并采用结构设计方法。
The VHDL language as an advanced hardware description language is playing a more and more important role in digital circuitry designs with its nimble and simple design style. VHDL语言作为先进的硬件描述语言,也以其灵活、简洁的设计风格再电路设计中发挥着越来越重要的作用。
The application of hardware description language VHSIC in design of ASIC 硬件描述语言在专用集成电路设计中的应用
Assisting teachers to use the multimedia software and hardware in language classrooms. 协助教师使用语言教室之多媒体软硬体设备。
The paper studies the hardware of the interface circuit and how to control the sweep fingerprint sensor to complete the task of high quality fingerprint gathering with hardware language VHDL. 重点研究接口电路的硬件组成和如何采用硬件语言VHDL编程控制滑动式指纹传感器以完成高质量的指纹采集工作。
The development and its features of a new type hardware description language, VHDL, is introduced. 介绍了新型硬件描述语言VHDL的发展及特点;
UHDL-A Universal Hardware Description Language and its compiler is presented in this paper. 本文介绍了一种通用硬件描述语言&UHDL及其编译器的设计与实现。
In this thesis, VHDL hardware description language was applied to program FPGA to realize high accurate pulse generator. 本文采用VHDL硬件描述语言对FPGA编程实现了高精度脉冲发生器。
The aim of this paper is to implement the decoder of turbo codes with FPGA. The iterative decoding algorithms and how to implement them with hardware language have been discussed in the paper. 本文以Turbo码译码器的FPGA实现为目标,对Turbo码的迭代译码算法及用硬件语言实现其译码算法进行了深入研究。
This Paper discusses the design for testability with boundary scan and its hardware description language VHDL. 在这基础上讨论了边界扫描可测性设计技术及其硬件描述语言VHDL。
This design realizes with verilog hardware describing language, so it has a good flexibility and portability. 本设计采用Verilog硬件描述语言实现,具有良好的可移植性和设计灵活性。
The main work is as follows: Study video signal, USB2.0 specification and Hardware Description Language; 主要完成了以下工作:研究视频信号、USB2.0规范及硬件描述语言;
Finally the USB controller is described with hardware description language, simulated and synthesized by the tools. 最后用硬件描述语言对USB设备控制器进行描述,并用仿真工具和综合工具对该设计进行仿真和综合。
VHDL ( Very High Speed Integrated Circuit Hardware Description Language) is widely applied in electronic design fields today. VHDL(超高速集成电路硬件描述语言)在电子设计领域中已得到了广泛用。
The design of FPGA uses design method of top-down and Hardware Description Language, reduces develop time and cost. FPGA的设计采用自顶向下的设计方法和硬件描述语言,大大缩短了开发时间,降低了开发成本,设计中使用相关的EDA软件实现了仿真。
Then data gained by simulation through the hardware language VHDL were listed out, which proved the validity of the conversion on hardware system. 并列出了一组由VHDL硬件语言模拟得到的转化结果的数据,来证实能在硬件上转化的正确性;
It described the structure and algorithm flow using the hardware description language ( VHDL). 用硬件描述语言(VHDL)描述了该算法的整体结构和算法流程;
The RTL-level design and verification of the three modules using the Verilog hardware description language is completed. 使用Verilog硬件描述语言完成了三个运算逻辑模块RTL级的设计与验证。
Finally, Verilog HDL hardware language program was written in the FPGA to realize the function of the circuit module and simulated and validated the interpolation algorithm. 最后通过对FPGA编写Veriloghdl硬件语言程序,实现各电路模块的功能以及对插补算法的仿真验证以及实现。
Finally, based on the simulations, the dissertation designs the demodulation system with hardware language. For the need of low resource consumption and the easiness of implement, the methods of modules implement are compared and optimized. 最后,在仿真的基础上,利用硬件语言编写解调系统,对各个功能模块的实现方法进行比较和优化,使该解调系统在满足功能的基础上易于实现、资源消耗少。
The core part of the hardware sub-system is realized with FPGA while the hardware description language is Verilog. 采用FPGA实现发射机和接收机的硬件子系统的核心部分,硬件描述语言采用的是Verilog。